The present invention relates generally to semiconductor device packages and, more particularly, to quad flat no lead (QFN) packages, power QFN (PQFN) packages, and the like.
Certain semiconductor packages, such as Quad Flat No-lead (QFN) and power QFN (PQFN) packages, include an integrated circuit (IC) die or other active component physically attached to a lead frame and electrically connected to the lead frame with a bond wires that span die pads on the die to respective leads of the lead frame. The IC die, the bond wires, and an interior portion of the lead frame are encapsulated by a mold compound, leaving a portion of the leads on the surface of the package exposed. These exposed leads serve as input and output (I/O) connections to the encapsulated IC die and are typically located along a periphery of the QFN package. Compared to other types of semiconductor packages, QFN packages advantageously provide shorter electrical paths and faster signal communication rates and are therefore widely used for power elements and other IC dies.
In a typical QFN package, a square IC die having die pads on all four sides, where the die pads are arranged in a square, is disposed centrally within a square lead frame that has leads on all four sides, where the leads are also arranged in a square. This configuration makes routing of bond wires straightforward because the bond wires are disposed substantially radially and can be spaced sufficiently so as not to interfere with one another.
However, a conventional QFN package that has leads on all four sides is not flexible enough to accommodate IC dies having other configurations, such as an elongated rectangular IC die having die pads on only two sides, where the die pads are arranged in two parallel rows along the longer edges of the IC die. If bond wire connections were attempted between these two parallel rows of die pads on the IC die and the square arrangement of leads disposed around the surrounding lead frame, then a number of the bond wires would not be able to be routed and still be spaced sufficiently apart. In particular, the bond wires connecting the die pads disposed near the corners of the IC die will likely either touch one another or be disposed so closely as to risk interference with one another.
Other IC dies may have die pad configurations that create similar problems for routing bond wires, such as a square IC die having a first set of die pads arranged in a square around its periphery and a second set of die pads arranged in a smaller square disposed within the first set of die pads.
Accordingly, it would be advantageous to have a QFN package that can accommodate IC dies having different or non-conventional die-pad configurations.